Sub-1V CMOS voltage reference based on weighted Vgs

Xun Zhang, Peng Wang, Dongming Jin

Research output: Contribution to journalArticlepeer-review

1 Scopus citations


We propose a voltage reference based on the weighted difference between the gate-source voltages of an nMOS and a pMOS operating in their saturation regions. No diodes or parasitic bipolar transistors are used. The circuit is simulated and fabricated with SMIC 0.18 μm mixed-signal technology, and our measurements demonstrate that its temperature coefficient is 44 ppm/°C and its PSRR is -46 dB. It works well when Vdd is above 650 mV. The active area of the circuit is about 0.05 mm2.

Original languageEnglish
Pages (from-to)774-777
Number of pages4
JournalPan Tao Ti Hsueh Pao/Chinese Journal of Semiconductors
Issue number5
StatePublished - May 2006
Externally publishedYes


  • Power supply rejection ratio
  • Temperature coefficient
  • Voltage reference


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