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Simulation of hot-carrier reliability in MOS integrated circuits
H. Wong
, M. C. Poon
Research output
:
Contribution to conference
›
Paper
›
peer-review
4
Scopus citations
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Keyphrases
Hot Electrons
100%
Hot Carrier Reliability
100%
MOS Integrated Circuits
100%
Spices
50%
Length-dependent
50%
Gate Oxide
50%
Induced Degradation
50%
Revised Model
50%
Channel Length
50%
Electron Induced
50%
Trap Model
50%
Bias Dependence
50%
Channel Bias
50%
Thermionic Emission Model
50%
Hot Electron Injection
50%
Impact Ionization
50%
Ionization Region
50%
Substrate Current
50%
Engineering
Integrated Circuit
100%
Hot Electron
100%
Experimental Result
33%
Simulation Result
33%
Good Correlation
33%
Gate Oxide
33%
Electron Injection
33%
SPICE
33%
Channel Length
33%
Induced Degradation
33%
Impact Ionization
33%