Modeling of large-grain polysilicon formation under retardation effect of SPC

C. F. Cheng; T. C. Leung; M. C. Poon; C. W. Kok; Mansun Chan

doi:10.1109/TED.2004.838323

Modeling of large-grain polysilicon formation under retardation effect of SPC

C. F. Cheng, T. C. Leung, M. C. Poon, C. W. Kok, Mansun Chan

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9 Scopus citations

Abstract

This paper details the study of the mechanism of large-grain polysilicon layer formations using metal-induced lateral crystallization (MILC). A model is proposed to predict the growth rate of MILC under the retardation effect of solid-phase crystallization (SPC) at different annealing conditions. The model has been extensively validated by experimental data. This paper will show that the SPC exists as a counter-effect to retard the MILC and degrade the superiority of the polysilicon layer. The model has been used to predict the MILC rate of large-grain polysilicon grown by a pulsed-annealing technique that suppresses the undesirable SPC effect. The model prediction agrees well with the experimental results.

Original language	English
Pages (from-to)	2205-2210
Number of pages	6
Journal	IEEE Transactions on Electron Devices
Volume	51
Issue number	12
DOIs	https://doi.org/10.1109/TED.2004.838323
State	Published - 1 Dec 2004
Externally published	Yes

Keywords

Crystallization
Large-grain
Polysilicon
Thermal annealing
Thin-film transistor (TFT)

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10.1109/TED.2004.838323

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title = "Modeling of large-grain polysilicon formation under retardation effect of SPC",

abstract = "This paper details the study of the mechanism of large-grain polysilicon layer formations using metal-induced lateral crystallization (MILC). A model is proposed to predict the growth rate of MILC under the retardation effect of solid-phase crystallization (SPC) at different annealing conditions. The model has been extensively validated by experimental data. This paper will show that the SPC exists as a counter-effect to retard the MILC and degrade the superiority of the polysilicon layer. The model has been used to predict the MILC rate of large-grain polysilicon grown by a pulsed-annealing technique that suppresses the undesirable SPC effect. The model prediction agrees well with the experimental results.",

keywords = "Crystallization, Large-grain, Polysilicon, Thermal annealing, Thin-film transistor (TFT)",

author = "Cheng, {C. F.} and Leung, {T. C.} and Poon, {M. C.} and Kok, {C. W.} and Mansun Chan",

note = "Funding Information: Manuscript received January 12, 2004; revised September 3, 2004. This work was supported by the Research Grant Council of Hong Kong under the Competitive Earmarked Research Grant KUST6207/03E. The review of this paper was arranged by Editor S. Kimura.",

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doi = "10.1109/TED.2004.838323",

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AU - Cheng, C. F.

AU - Leung, T. C.

AU - Poon, M. C.

AU - Kok, C. W.

AU - Chan, Mansun

N1 - Funding Information: Manuscript received January 12, 2004; revised September 3, 2004. This work was supported by the Research Grant Council of Hong Kong under the Competitive Earmarked Research Grant KUST6207/03E. The review of this paper was arranged by Editor S. Kimura.

PY - 2004/12/1

Y1 - 2004/12/1

N2 - This paper details the study of the mechanism of large-grain polysilicon layer formations using metal-induced lateral crystallization (MILC). A model is proposed to predict the growth rate of MILC under the retardation effect of solid-phase crystallization (SPC) at different annealing conditions. The model has been extensively validated by experimental data. This paper will show that the SPC exists as a counter-effect to retard the MILC and degrade the superiority of the polysilicon layer. The model has been used to predict the MILC rate of large-grain polysilicon grown by a pulsed-annealing technique that suppresses the undesirable SPC effect. The model prediction agrees well with the experimental results.

AB - This paper details the study of the mechanism of large-grain polysilicon layer formations using metal-induced lateral crystallization (MILC). A model is proposed to predict the growth rate of MILC under the retardation effect of solid-phase crystallization (SPC) at different annealing conditions. The model has been extensively validated by experimental data. This paper will show that the SPC exists as a counter-effect to retard the MILC and degrade the superiority of the polysilicon layer. The model has been used to predict the MILC rate of large-grain polysilicon grown by a pulsed-annealing technique that suppresses the undesirable SPC effect. The model prediction agrees well with the experimental results.

KW - Crystallization

KW - Large-grain

KW - Polysilicon

KW - Thermal annealing

KW - Thin-film transistor (TFT)

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SP - 2205

EP - 2210

JO - IEEE Transactions on Electron Devices

JF - IEEE Transactions on Electron Devices

IS - 12

ER -

Modeling of large-grain polysilicon formation under retardation effect of SPC

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Keywords

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