Abstract
This paper describes a RS485 communications protocol for high-speed baseband communications. The inter symbol interference (ISI) is reduced by an efficient bit synchronization signal detection scheme. Sampling begins at the beginning of the input signals to get exact digital results. The frame synchronization uses 8B/10B coding and guarantees bit synchronization. The protocol was implemented on a field programmable gate array (FPGA)with test results indicating that the protocol achieves 14.5 Mb/s along a 220 meters line.
Original language | English |
---|---|
Pages (from-to) | 1311-1314 |
Number of pages | 4 |
Journal | Qinghua Daxue Xuebao/Journal of Tsinghua University |
Volume | 48 |
Issue number | 8 |
State | Published - Aug 2008 |
Externally published | Yes |
Keywords
- Communication protocol
- Field programmable gate array (FPGA)
- RS485 bus