Design and implement of RS485 high speed data communications protocol

Lizhong Geng, Peng Wang, Cheng Ma, Huibo Jia

Research output: Contribution to journalArticlepeer-review

14 Scopus citations

Abstract

This paper describes a RS485 communications protocol for high-speed baseband communications. The inter symbol interference (ISI) is reduced by an efficient bit synchronization signal detection scheme. Sampling begins at the beginning of the input signals to get exact digital results. The frame synchronization uses 8B/10B coding and guarantees bit synchronization. The protocol was implemented on a field programmable gate array (FPGA)with test results indicating that the protocol achieves 14.5 Mb/s along a 220 meters line.

Original languageEnglish
Pages (from-to)1311-1314
Number of pages4
JournalQinghua Daxue Xuebao/Journal of Tsinghua University
Volume48
Issue number8
StatePublished - Aug 2008
Externally publishedYes

Keywords

  • Communication protocol
  • Field programmable gate array (FPGA)
  • RS485 bus

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