CMOS voltage reference based on weighted ΔV_GS

The power consumption in CMOS voltage references is often excessive. This paper describes a voltage reference based on the CMOS sub-threshold characteristics that requires less power. By using the weighted difference between the gate-source voltages of an NMOS and a PMOS operating in the saturation region, the resulting output voltage has a very low temperature coefficient and a high power supply rejection ratio since the current supplied to the voltage source is based on the MOSFETs operating in the sub-threshold region. The voltage source was fabricated with the mixed-signal technology of 0.18 μm of semiconductor manufacturing international corporation (SMIC). Measurements show that the temperature coefficient is only 2.5 × 10^-5/°C between 21°C to 110°C. The voltage source works well when V_DD IS above 1.4 V. The power supply rejection ratio is -57 dB.