TY - JOUR

T1 - Binary operations on neuromorphic hardware with application to linear algebraic operations and stochastic equations

AU - Iaroshenko, Oleksandr

AU - Sornborger, Andrew T.

AU - Chavez Arana, Diego

N1 - Publisher Copyright:
© 2023 The Author(s). Published by IOP Publishing Ltd.

PY - 2023/3/1

Y1 - 2023/3/1

N2 - Non-von Neumann computational hardware, based on neuron-inspired, non-linear elements connected via linear, weighted synapses—so-called neuromorphic systems—is a viable computational substrate. Since neuromorphic systems have been shown to use less power than CPUs for many applications, they are of potential use in autonomous systems such as robots, drones, and satellites, for which power resources are at a premium. The power used by neuromorphic systems is approximately proportional to the number of spiking events produced by neurons on-chip. However, typical information encoding on these chips is in the form of firing rates that unarily encode information. That is, the number of spikes generated by a neuron is meant to be proportional to an encoded value used in a computation or algorithm. Unary encoding is less efficient (produces more spikes) than binary encoding. For this reason, here we present neuromorphic computational mechanisms for implementing binary two’s complement operations. We use the mechanisms to construct a neuromorphic, binary matrix multiplication algorithm that may be used as a primitive for linear differential equation integration, deep networks, and other standard calculations. We also construct a random walk circuit and apply it in Brownian motion simulations. We study how both algorithms scale in circuit size and iteration time.

AB - Non-von Neumann computational hardware, based on neuron-inspired, non-linear elements connected via linear, weighted synapses—so-called neuromorphic systems—is a viable computational substrate. Since neuromorphic systems have been shown to use less power than CPUs for many applications, they are of potential use in autonomous systems such as robots, drones, and satellites, for which power resources are at a premium. The power used by neuromorphic systems is approximately proportional to the number of spiking events produced by neurons on-chip. However, typical information encoding on these chips is in the form of firing rates that unarily encode information. That is, the number of spikes generated by a neuron is meant to be proportional to an encoded value used in a computation or algorithm. Unary encoding is less efficient (produces more spikes) than binary encoding. For this reason, here we present neuromorphic computational mechanisms for implementing binary two’s complement operations. We use the mechanisms to construct a neuromorphic, binary matrix multiplication algorithm that may be used as a primitive for linear differential equation integration, deep networks, and other standard calculations. We also construct a random walk circuit and apply it in Brownian motion simulations. We study how both algorithms scale in circuit size and iteration time.

KW - binary operation

KW - matrix multiplication

KW - random walk

KW - spiking algorithm

KW - two’s complement

UR - http://www.scopus.com/inward/record.url?scp=85160915277&partnerID=8YFLogxK

U2 - 10.1088/2634-4386/aca7dd

DO - 10.1088/2634-4386/aca7dd

M3 - Article

AN - SCOPUS:85160915277

SN - 2634-4386

VL - 3

JO - Neuromorphic Computing and Engineering

JF - Neuromorphic Computing and Engineering

IS - 1

M1 - 014002

ER -