A parallel algorithm for side information generation in distributed video coding

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

Most of the reported Distributed Video Coding (DVC) schemes have a high time-delay in decoder which hinders its practical application in real-time systems. In this paper, we propose a new DVC decoder architecture based on MPI clusters and an efficient parallel algorithm for generation of the Side Information (SI) based on the structure. In order to achieve a balanced workload among the processors and minimize the overheads of inter-process interaction, we adopt a task-pool model to implement dynamic mapping of tasks onto processors. In addition, the proposed method also uses a threshold-based approach to attain good trade-off between decoding time and video quality. We analyze the effect of computational granularity and the number of processors on performance through defining a performance function. The experimental results on multicore PCs show that a near-linear speedup can be obtained by using the proposed parallel SI generating algorithm.

Original languageEnglish
Title of host publicationProceedings - IEEE ISIE 2009, IEEE International Symposium on Industrial Electronics
Pages1322-1326
Number of pages5
DOIs
StatePublished - 2009
Externally publishedYes
EventIEEE International Symposium on Industrial Electronics, IEEE ISIE 2009 - Seoul, Korea, Republic of
Duration: 5 Jul 20098 Jul 2009

Publication series

NameIEEE International Symposium on Industrial Electronics

Conference

ConferenceIEEE International Symposium on Industrial Electronics, IEEE ISIE 2009
Country/TerritoryKorea, Republic of
CitySeoul
Period5/07/098/07/09

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