TY - GEN
T1 - A Neural-Network-Based Non-linear Interference Cancellation Scheme for Wireless IoT Backhaul with Dual-Connectivity
AU - Zhang, Huiliang
AU - Wang, Zhonglong
AU - Qin, Fei
AU - Ma, Meng
AU - Zhang, Jianhua
N1 - Publisher Copyright:
© 2019 IEEE.
PY - 2019/9
Y1 - 2019/9
N2 - In this paper, we consider an Internet of Things (IoT) wireless network using Long Term Evolution (LTE) cellular system as backhaul. To provide high throughput, by using dual-connectivity technique, the IoT gateway simultaneously connects to two evolved Node Bs (eNBs) on two carriers, one for downlink and the other for uplink. As a result, the receive link will be severely interfered by the harmonic interference (HI) and inter-modulation (IM) components caused by the imperfections of power amplifier (PA) and in-phase/quadrature (I/Q) modulator. To solve this problem, in this paper, an neural-network (NN)based non-linear interference cancellation scheme is proposed for dual-connectivity IoT gateway. In the proposed scheme, the nonlinear interference is first reconstructed by using the transmit signal and the trained NN in baseband, and then subtracted from the received signal in digital domain at receiver. The NN precisely models the link behavior from the baseband transmitter to the baseband receiver, including all the linear and non-linear effect. Additionally, the NN can be used to reconstruct and cancel not only the HI, but also the IM components of the mirror-frequency interference (MFI) caused by I/Q imbalance, and direct current (DC) bias caused by local oscillator (LO) leakage. To evaluate the performance of the proposed scheme, a hardware prototype is designed and implemented. Experimental results show that the proposed scheme has a superior performance in dual-connectivity system compared with the traditional non-linear interference cancellation scheme using polynomial (PM) model.
AB - In this paper, we consider an Internet of Things (IoT) wireless network using Long Term Evolution (LTE) cellular system as backhaul. To provide high throughput, by using dual-connectivity technique, the IoT gateway simultaneously connects to two evolved Node Bs (eNBs) on two carriers, one for downlink and the other for uplink. As a result, the receive link will be severely interfered by the harmonic interference (HI) and inter-modulation (IM) components caused by the imperfections of power amplifier (PA) and in-phase/quadrature (I/Q) modulator. To solve this problem, in this paper, an neural-network (NN)based non-linear interference cancellation scheme is proposed for dual-connectivity IoT gateway. In the proposed scheme, the nonlinear interference is first reconstructed by using the transmit signal and the trained NN in baseband, and then subtracted from the received signal in digital domain at receiver. The NN precisely models the link behavior from the baseband transmitter to the baseband receiver, including all the linear and non-linear effect. Additionally, the NN can be used to reconstruct and cancel not only the HI, but also the IM components of the mirror-frequency interference (MFI) caused by I/Q imbalance, and direct current (DC) bias caused by local oscillator (LO) leakage. To evaluate the performance of the proposed scheme, a hardware prototype is designed and implemented. Experimental results show that the proposed scheme has a superior performance in dual-connectivity system compared with the traditional non-linear interference cancellation scheme using polynomial (PM) model.
KW - Iot gateway
KW - dual-connectivity
KW - inter-modulation
KW - neural-network
KW - non-linear interference
UR - http://www.scopus.com/inward/record.url?scp=85085205907&partnerID=8YFLogxK
U2 - 10.1109/SOCC46988.2019.1570559857
DO - 10.1109/SOCC46988.2019.1570559857
M3 - Conference contribution
AN - SCOPUS:85085205907
T3 - International System on Chip Conference
SP - 444
EP - 448
BT - Proceedings - 32nd IEEE International System on Chip Conference, SOCC 2019
A2 - Zhao, Danella
A2 - Basu, Arindam
A2 - Bayoumi, Magdy
A2 - Hwee, Gwee Bah
A2 - Tong, Ge
A2 - Sridhar, Ramalingam
PB - IEEE Computer Society
T2 - 32nd IEEE International System on Chip Conference, SOCC 2019
Y2 - 3 September 2019 through 6 September 2019
ER -